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fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch ? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 rev. 1.1.7 february 2012 click to see this datasheet in simplified chinese! fsusb30 low-power, two-port, high-speed usb 2.0 (480mbps) switch features ? low on capacitance: 3.7pf (typical) ? low on resistance: 6.5 ? (typical) ? low power consumption: 1a (maximum) ? 10a maximum i cct over an expanded control voltage range (v in = 2.6v, v cc = 4.3v) ? wide -3db bandwidth, >720mhz ? 8kv esd protection ? power-off protection when v cc = 0v; d+/d- pins can tolerate up to 5.5v ? packaged in: ? 10-lead micropak? (1.6 x 2.1mm) ? 14-lead dqfn ? 10-lead msop ? 10-lead umlp (1.4 x 1.8mm) applications ? cell phone, pda, digital camera, and notebook lcd monitor, tv, and set-top box related application notes ? an-6022 using the fsusb30 / fsusb31 to comply with usb 2.0 fault condition requirements description the fsusb30 is a low-power, two-port, high-speed usb 2.0 switch. configured as a double-pole double-throw (dpdt) switch, it is optimized for switching between two high-speed (480mbps) sources or a hi-speed and full- speed (12mbps) source. the fsusb30 is compatible with the requirements of usb2.0 and features an extremely low on capacitance (c on ) of 3.7pf. the wide bandwidth of this device (720mhz), exceeds the band- width needed to pass the third harmonic, resulting in sig- nals with minimum edge and phase distortion. superior channel-to-channel crosstalk minimizes interference. the fsusb30 contains special circuitry on the d+/ d- pins which allows the device to withstand an overvoltage condition when powered off. this device is also designed to minimize current consumption even when the control voltage applied to the s pin, is lower than the supply volt- age (v cc ). this feature is especially valuable to ultra- portable applications such as cell phones, allowing for direct interface with the general purpose i/os of the baseband processor. other appl ications include switch- ing and connector sharing in portable cell phones, pdas, digital cameras, printers, and notebook computers. ordering information figure 1. typical application micropak ? is a trademark of fairchild semiconductor corporation. order number package number product code top mark package description fsusb30l10x mac010a fj 10-lead micropak, 1.6 x 2.1mm fsusb30bqx mlp014a usb30 14-terminal depopulated quad very-thin flat pack no leads (dqfn), jedec mo-241, 2.5 x 3.0mm fsusb30mux mua10a fsusb30 10-lead molded small outline package (msop), jedec mo- 187, 3.0mm wide fsusb30umx mlp010a gj 10-lead, quad, ultrathin, mlp (umlp) 1.4 x 1.8mm usb2.0 controller set top box (stb) cpu or dsp processor dvr or mass storage controller 1d+ v cc 1d? 2d+ 2d? usb connector fsusb30 d+ d? s oe control
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 2 connection diagrams analog symbol pin descriptions truth table pin name description oe bus switch enable s select input d+, d ? , hsdn+, hsdn ? data ports nc no connect s oe function x high disconnect low low d+, d ? = hsd1 n high low d+, d ? = hsd2 n hsd1+ hsd2+ d+ s oe control hsd1? hsd2? d? 9 pad assignments for micropak (top view) pad assignments for dqfn (top through view) pin assignment for msop (top through view) (top through view) 876 5 10 2 14 v cc v cc v cc 13 oe 134 1 8 7 nc nc gnd gnd 12 hsd1? 11 nc 10 hsd2? 9 2 3 4 5 6 d? s hsd1+ nc hsd2+ d+ s hsd1+ hsd2+ d+ s hsd1+ gnd hsd2+ d+ oe hsd1? hsd2? d? pad assignments for mlp oe hsd1? hsd2? d? 10 9 8 7 6 1 2 3 4 5 v cc sel 1 2 7 6 3 4 5 10 9 8 gnd hsd1+ hsd2+ d+ hsd1? hsd2? oe d?
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 3 absolute maximum ratings stresses exceeding the absolute maximu m ratings may damage the device. the de vice may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. note: 1. the input and output negative voltage ratings may be ex ceeded if the input and output diode current ratings are observed. recommended oper ating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal perfor mance to the datasheet specif ications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. (2) note: 2. control input must be held high or low and it must not float. symbol parameter minimum maximum unit v cc supply voltage -0.5 +5.5 v v cntrl dc input voltage (1) -0.5 v cc v v sw dc switch voltage (1) hsdnx 0.5 v cc v d+,d- when v cc > 0 0.5 v cc v d+,d- when v cc = 0 -0.50 v cc v i ik dc input diode current -50 ma i out dc output current 50 ma t stg storage temperature -65 +150 c esd human body model all pins 8 kv i/o to gnd 8 kv symbol parameter minimum maximum unit v cc supply voltage 3.0 4.3 v v in control input voltage 0 v cc v v sw switch input voltage 0 v cc v t a operating temperature -40 +85 c ? j a thermal resistance, 10 micropak 250 c/w
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 4 dc electrical characteristics all typical values are at 25 c unless otherwise specified. notes: 3. measured by the voltage drop between dn, hsd1 n , hsd2 n pins at the indicated current through the switch. on resistance is determined by the lower of the voltage on the two ports. 4.guaranteed by characterization. ac electrical characteristics all typical values are for v cc = 3.3v at 25c unle ss otherwise specified. symbol parameter conditions v cc (v) t a = ? 40c to +85c unit min. typ. max. v ik clamp diode voltage i in = -18ma 3.0 -1.2 v v ih input voltage high 3.0 to 3.6 1.3 v 4.3 1.7 v v il input voltage low 3.0 to 3.6 0.5 v 4.3 0.7 v i in control input leakage v sw = 0.0v to v cc 4.3 -1.0 1.0 a i oz off state leakage 0 ? dn, hsd1 n , hsd2 n ? v cc 4.3 -2.0 2.0 a i off power off leakage current (d+, d?) v sw = 0v to 4.3v, v cc = 0v 0 -2.0 2.0 a r on switch on resistance (3) v sw = 0.4v, i on = -8ma 3.0 6.5 10.0 ? v sw = 0v, i o = 30ma at 25c 3.6 7.0 ? ? r on delta r on (4) v sw = 0.4v, i on = -8ma 3.0 0.35 ? r on flatness r on flatness (3) v sw = 0.0v - 1.0v, i on = -8ma 3.0 2.0 ? i cc quiescent supply current v cntrl = 0.0v or v cc , i out = 0 4.3 1.0 a i cct increase in i cc current per control voltage v cntrl (control input) = 2.6v 4.3 10.0 a symbol parameter conditions v cc (v) t a = ? 40c to +85c unit figure number min. typ. max. t on turn-on time s, oe to output hd1 n , hd2 n = 0.8v, r l = 50 ? , c l = 5pf 3.0 to 3.6 13 30 ns figure 9 t off turn-off time s, oe to output hd1 n , hd2 n = 0.8v, r l = 50 ? , c l = 5pf 3.0 to 3.6 12 25 ns figure 9 t pd propagation delay (4) r l = 50 ? , c l = 5pf 3.3 0.25 ns figure 7 figure 8 t bbm break-before-make r l = 50 ? , c l = 5pf, v in = 0.8v 3.0 to 3.6 2.0 6.5 ns figure 10 o irr off isolation (non-adjacent) f = 240mhz, r t = 50 ? 3.0 to 3.6 -30 db figure 13 xtalk non-adjacent channel crosstalk r t = 50 ? , f = 240mhz 3.0 to 3.6 -45 db figure 14 bw ? 3db bandwidth r t = 50 ? , c l = 0pf 3.0 to 3.6 720 mhz figure 12 r t = 50 ? , c l = 5pf 550
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 5 usb hi-speed related ac electrical characteristics note: 5. guaranteed by characterization. capacitance symbol parameter conditions v cc (v) t a = ? 40c to +85c units figure number min. typ. max. t sk(o) channel-to-channel skew (5) r l = 50 ? , c l = 5pf 3.0 to 3.6 50 ps figure 7 figure 11 t sk(p) skew of opposite transitions of the same output (5) r l = 50 ? , c l = 5pf 3.0 to 3.6 20 ps figure 7 figure 11 t j to ta l j i t t e r (5) r l = 50 ? , c l = 5pf, t r = t f = 500ps at 480 mbps (prbs = 2 15 ? 1) 3.0 to 3.6 200 ps symbol parameter conditions t a = ? 40c to +85c units figure number min. typ. max. c in control pin input capacitance v cc = 0v 1.5 pf figure 16 c on d1 n , d2 n , dn on capacitance v cc = 3.3, oe = 0v 3.7 pf figure 15 c off d1 n , d2 n off capacitance v cc and oe = 3.3 2.5 pf figure 16
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 6 typical characteristics figure 2. gain vs. frequency figure 3. off isolation figure 4. crosstalk frequency response -8 -7 -6 -5 -4 -3 -2 -1 0 1 10 100 1000 10000 frequency (mhz) gain (db) c l = 0pf, v cc = 3.3v frequency (mhz) frequency response -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 1 10 100 1000 off isolation (db) frequency (mhz) frequency response 1 10 100 1000 v cc = 3.3v -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 crosstalk (db)
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 7 test diagrams figure 5. on resistan ce figure 6. off leakage figure 7. ac test circuit load figure 8. switch propagation delay waveforms figure 9. turn-on / turn-off waveform hsdn i on v on gnd gnd v in dn select v s = 0 to v cc r on = v on / i on gnd v in select id n(off) v s = 0 or v cc nc a each switch port is tested separately. r l r s c l hsdn v in v sel d+, d? gnd gnd gnd v out r l , r s , and c l are functions of the application environment (see ac electrical tables for specific values). c l includes test fixture and stray capacitance. t rise = 500ps t plh hsdn+, hsdn? input: output: d+, d? t fall = 500ps v oh 90% 50% 50% 90% 10% 10% 50% t phl 50% v ol 800mv 400mv t rise = 2.5ns t on t off input ? s, oe output ? v out t fall = 2.5ns v oh 90% v cc /2 v cc /2 90% 10% 10% 90% 90% v ol v cc gnd
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 8 figure 10. break-before-make (t bbm ) figure 11. switch skew tests figure 12. bandwidth t d t r = t f = 2.5ns (10?90%) r l s c l * hsdn hsdn v o control input d+, d? gnd control input 50% v cc 0v v out v out v cc v cc 0.9 x v out *c l includes test fixture and stray capacitance. t rise = 500ps t plh t phl input: output: d+, d? hsdn+ hsdn? t fall = 500ps v oh 90% 90% 50% 50% 10% 10% 50% 50% v ol 800mv t sk(p) = | t phl ? t plh | pulse skew, t sk(p) 400mv t rise = 500ps t plh1 t phl1 output1: input: d+, d? output1: d2+, d2? hsd1+ hsd1? t fall = 500ps v oh 90% 90% 50% 50% 10% 10% 50% 50% v ol 800mv t sk(o) = | t plh1 ? t plh2 | or | t phl1 ? t phl2 | output skew, t sk(out) 400mv t plh2 t phl2 v oh 50% 50% v ol r s v in fsusb30 gnd v sel network analyzer v out gnd v s gnd r t gnd gnd r s and r t are functions of the application environment (see ac electrical tables for specific values).
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 9 figure 13. channel off isolation figure 14. non-adjacent ch annel-to-channel crosstalk figure 15. channel on capacitance f igure 16. channel off capacitance r t r s v in fsusb30 gnd v sel network analyzer v out gnd v s gnd gnd off-isolation = 20 log (v out / v in ) r t gnd gnd r t r s v in fsusb30 gnd v sel network analyzer v out gnd nc v s gnd gnd r s and r t are functions of the application environment (50, 75 or 100 ) crosstalk = 20 log (v out / v in ) r t gnd gnd fsusb30 s dn capacitance meter f = 240mhz v sel = 0 or v cc d1n, d2n fsusb30 s dn capacitance meter f = 240mhz v sel = 0 or v cc d1n, d2n
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 10 application guidance: meeting usb 2.0 vbus short requirements in section 7.1.1 of the usb 2.0 specification, it notes that usb devices must be able to withstand a vbus short to d+ or d- when the usb devices is either powered off or powered on. the fsusb30 can be successfully config- ured to meet both these requirements. power-off protection for a vbus short circuit, the switch is expected to with- stand such a condition for at least 24 hours. the fsusb30 has specially designed circuitry which pre- vents unintended signal bleed through as well as guar- anteed system reliability dur ing a power-down, over- voltage condition. the protection has been added to the common pins (d+, d-). power-on protection the usb 2.0 specification also notes that the usb device should be capable of withstanding a vbus short during transmission of data. fairchild recommends add- ing a 100 ? series resister between the switch vcc pin and supply rail to protect against this case. this modifi- cation works by limiting current flow back into the v cc rail during the over-voltage event so current remains within the safe operating range. in this application, the switch passes the full 5.25v input signal through to the selected output, while maintaining specified off isolation on the un-selected pins. d+ = 5.25v vcc= 3.6 v 100 ohms fsusb30 d- = 5.25v hsd+ hsd+ hsd- hsd- figure 17. adding 100 ? resistor in series with the v cc supply allows the fsusb30 to withstand a vbus short when powered up for more information, see applications note an-6022 using the fsusb30 to comply with usb 2.0 fault condition requirements at www.fairchildsemi.com
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 11 tape and reel specifications tape format for dqfn tape dimensions dimenions are in millimeters unless otherwise specified. package designator tape section number cavities cavity status cover tape status bqx leader (start end) 125 (typ) empty sealed carrier 2500/3000 filled sealed trailer (hub end) 75 (typ) empty sealed
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 12 reel dimensio ns for dqfn dimensions are in inches (millimet ers) unless otherwise specified. tape sizeabcdnw1w2 (12mm) 13.0 (330) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 7.008 (178) 0.488 (12.4) 0.724 (18.4)
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.7 13 tape dimensions for msop dimensions are in inches (millimet ers) unless otherwise specified. reel dimensions for msop dimensions are in inches (millimeter s) unless otherwise specified tape sizeabcdnw1w2w3 (12mm) 13 (330) 0.059 (1.5) 0.512 (13) 0.795 (20.2) 7.008 (178) 0.448 (12.4) 0.724 (18.4) 0.468-0.606 (11.9 -15.4)
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.7 14 physical dimensions figure 17. 10-lead micropak, 1.6 x 2.1mm for tape and reel specificati ons, visit fairchild?s website: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf . package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, wh ich covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . bottom view top view recommended land pattern side view 2x 2x notes: a. package conforms to jedec registration mo-255, variation uabd . b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994. d. presence of center pad is package supplier dependent. if present it is not intended to be soldered and has a black oxide finish. e. drawing filename: mkt-mac10arev5. 0.10 c 0.10 c 0.10 cab 0.05 c pin1 ident is 2x longer than other lines a b c 0.35 0.25 9x 9x 14 9 6 0.25 0.15 10 5 0.50 0.56 1.62 0.05 0.00 0.05 c 0.55 max 0.05 c 1.60 2.10 (0.35) (0.25) 0.50 10x 10x (0.11) 1.12 1.62 keepout zone, no traces or vias allowed (0.20) (0.15) 0.35 0.25 0.35 0.25 detail a detail a 2x scale 0.35 0.25 0.65 0.55 d all features (0.36) (0.29) 0.56
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 15 physical dimensions figure 18. 14-terminal de-populated quad very-thin fl at pack no leads (dqfn), jedec mo-241, 2.5 x 3.0mm package drawings are provided as a service to customers considering fairchild component s. drawings may change in any manner wit h- out notice. please note the revision and/or date on the drawing and contact a fairchild semiconducto r representative to verify or obtain the most recent revision. package specific ations do not expand the terms of fairchil d?s worldwide terms and conditions, specifi cally the warranty therein, which covers fairchild products. always visit fairchild semicond uctor?s online packaging area for t he most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.6 16 physical dimensions figure 19. 10-lead molded small outline package (msop), jedec mo-187, 3.0mm wide package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, wh ich covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.7 17 physical dimensions figure 20. 10-lead, quad, ultrathin molded leadless package (umlp), 1.4 x 1.8mm package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, wh ich covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . a b c seating plane detail a pin#1 ident recommended land pattern notes: a. package does not fully conform to jedec standard. b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994. d. land pattern recommendation is based on fsc design only. e. drawing filename: mkt-umlp10arev3. top view bottom view 0.15 c 0.08 c 0.15 c 2x 2x side view 0.10 c 0.05 3 6 1 0.10 c a b 0.05 c 0.55 max. 10 1.40 1.80 0.40 0.15 0.25 (10x) 0.35 0.45 (9x) 1.70 2.10 0.40 0.663 0.563 (9x) 0.225 (10x) 1 0.152 0.10 0.10 0.55 0.45 0.10 detail a scale : 2x 1.85 1.45 0.55 0.40 0.225 (10x) 9x 0.45 pin#1 ident optional minimial toe land pattern scale : 2x lead option 1 scale : 2x lead option 2 package edge
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb30 low-power, two-port, hi gh-speed usb 2.0 (480mbps) switch fsusb30 rev. 1.1.7 18

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